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st ST3011 audio decoder/encoder notice: sitronixtechnologycorp.reservestherig httochangethecontentsinthisdocumentwithout priornotice. thisisnotafinalspecification. someparametersaresubjecttochange. ver0.2 1 / 13 20070614 1 1 . . f f e e a a t t u u r r e e s s 24-bit dsp based voice/audio processor operation voltage Ccorelogic:2.25v~2.7v Ci/opads:3.0v~3.6v voltage regulator for core logic low voltage reset (lvr) _2.5vlowvoltagereset one pll to generate high system frequency from a 3mhz source _12m~30mhzplloutput tow clock sources _crystal.......................................... .................3mhz _externalinput.........3mhz low power down current _typicalcurrent:3ua one 16-bit programmable timer one clocking output one external interrupt _edge/leveltriggersupported one 16-bit direct-drive dac Cmaximumcurrent:145ma mcu interfaces _parallelmode two serial port interfaces(sp) _programmabledatalengthfrom8bitto16bit _i2s,left/rightjustifiedinterfacestoexternal dac/adc function list _mbrcplayback(5.4kbps,6.4kbpsfor8khz) (7.4kbps,8.8kbpsfor11khz) 1.abrepeat 2.timestretch (speedupx2,speeddownx2) 3.combinesyllable 4.encryption _audioplayback(cbr,vbrallbitrate) 1.forward/backwardplay,abrepeat 2.encryption 3.spectrumgain 4.timestretch (speedupx1.5,speeddownx1.5) 5.combinesyllable _wavplayback 1.forward/backwardplay,abrepeat _wavrecord{msadpcm(3.8:1)} 1.softwareagc 2 2 . . g g e e n n e e r r a a l l d d e e s s c c r r i i p p t t i i o o n n theST3011isahighlyintegratedandcosteffectiv e24bitdsp based audio processor for various consumer applicat ions. it consistsofonepowerfuldspforadvancedvoicedec oderand encoder algorithms of natural speech with less memo ry. it provides middle bit rate compression (mbrc) for voi ce playbackandaudioplayback. systemclockcomesfrom3mhzcrystalorexternalin put. ST3011has32i/osandthesecanbeeithergpioor functional pins. each pin can be programmed to input or output . one externalinterruptpincanberequestedbyexternal devices. one internal 16bit dac can provide significant vol ume equipping with internal amplifier. for particular a pplication or recorder, two general audio interfaces are supporte d to interface with external dac/adc. audio interface ca n be configuredtoi2sorleft/rightjustifiedcompatibl emode. thereareserialandparallelinterfacesforvariou sconnections withdifferentmcus.
ST3011 ver0.2 2/13 20070614 2.1 block diagram figure21 ST3011blockdiagram
ST3011 ver0.2 3/13 20070614 3 3 . . s s i i g g n n a a l l d d e e s s c c r r i i p p t t i i o o n n s s table31 signalfunctiondescription function group pin name pin # i/o description reset 1 i systemreset,lowactive pwd 1 i powerdown,lowactive pwda 1 o powerdownacknowledge,highactive oscxi 1 i crystalinputorroscillatorinput osxo 1 o crystaloutput eclk 1 i externalclockinput cmode[1:0] 2 i clocksourceselect 01=crystal 1x=eclk systemcontrol test[2:0] 3 i testmode so[1:0]/ dpa[7,15] 2 o so0/dpa[7],so1/dpa[15] speciali/o clko/ dpa[6] 1 o clockoutput/dpa[6] gpio dap[13,14], dpb[0:15] 18 i/o generali/o external interrupt xreq/dpa[5] 1 i externalinterrupt/dpa[5] tf0/dpa[0] 1 o transmitframesynchronization/dpa[0 ] rf0/dpa[1] 1 i receiveframesynchronization/dpa[1] tx0/dpa[2] 1 o serialdatatransmit/dpa[2] rx0/dpa[3] 1 i serialdatareceive/dpa[3] serialport0/ dpa[4:0] sclk0/dpa[4] 1 o serialclock/dpa[4] tf1/dpa[8] 1 o transmitframesynchronization/dpa[8 ] rf1/dpa[9] 1 i receiveframesynchronization/dpa[9] tx1/dpa[10] 1 o serialdatatransmit/dpa[10] rx1/dpa[11] 1 i serialdatareceive/dpa[11] serialport1/ dpa[12:8] sclk1/dpa[12] 1 o serialclock/dpa[12] d[0]/scl 1 i/o parallel:databus d[1]/sdi 1 i/o parallel:databus d[2]/sdo 1 i/o parallel:databus d[3:7] 5 i/o parallel:databus wr 1 i parallel:writeenable,lowactive rd 1 i parallel:readenable,lowactive cs 1 i parallel:chipselect,lowactive cmd 1 i parallel:command/dataselect h:data l:command req 1 o dspwantstosentcommandtomcu,lowactive rdy 1 o dsppermitmcuaccessdata,lowactive pmode 1 i parallelinterfaceselect 0:standardparallel(default) 1:specialparallel mcuinterface p/s 1 i parallel/serialinterfaceselect 0:serial 1:parallel
ST3011 ver0.2 4/13 20070614 vdd25 2 i 2.5vpower vss25 2 i 2.5vpowerground vdd33 2 i 3.3vpower vss33 2 i 3.3vpowerground regvdd33 1 i digitalpowerinputofregulator regvss33 1 i digitalpowergroundofregulator pllvdd25 1 i digitalpowerinputofpll pllvss25 1 i digitalpowergroundofpll pllvdd25a 1 i analogpowerinputofpll pllvss25a 1 i analogpowergroundofpll dacvdd33a 1 i analogpowerinputofdac dacvss33a 1 i analogpowergroundofdac dacovdd33a 2 i analogpowerinputofdacoutputstage power dacovss33a 2 i analogpowergroundofdacoutputstage vccout 1 o 2.5voutputofregulator regulator vref 1 o voltagereference daco 2 o dacdirectdrivepin(+) dacob 2 o dacdirectdrivepin() dac vcm 1 o commonmodevoltagereference
ST3011 ver0.2 5/13 20070614 4 4 . . e e l l e e c c t t r r i i c c a a l l c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s 4.1 absolute maximum rations dcsupplyvoltage:vdd33 0.3vto +4.5v operatingambienttemperature 10 cto+60 c storagetemperature 10 cto+125 c 4.2 dc electrical characteristics table41 dcelectricalcharacteristics standardoperationconditions:vdd33 =3.3v,gnd=0v,t a =25 c,unlessotherwisespecified parameter symbol min. typ. max. unit condition operatingvoltage vdd33 3.0 3.6 v operatingvoltage vdd25 2.25 2.5 2.7 v operatingcurrent i op 1 30 ma runat24mhzwithoutspeaker powerdowncurrent i pd 3 4.5 a outputdriving i od 15 ma outputsinking i os 27 ma inputlowvoltage v il 0.7 v inputhighvoltage v ih 1.3 v pullupresistor r pu 49 k pulldownresistor r pd 51 k lowvoltageresetlevel v lvr 2.4 2.5 2.6 v *note: stresses above those listed under absolute maximum ratingsmaycausepermanentdamagetothedevice. allthe ranges are stress ratings only. functional operatio n of this deviceattheseoranyotherconditionsabovethose indicated intheoperationalsectionsofthisspecificationi snotimpliedor intended.exposedtotheabsolutemaximumratingco nditions forextendedperiodsmayaffectdevicereliability.
ST3011 ver0.2 6/13 20070614 4.3 ac electrical characteristics figure41 serialinterfacetimingdiagram figure42 parallelinterfacetimingdiagram
ST3011 ver0.2 7/13 20070614 table42 timingparametersfor0 standardoperationconditions:vdd33 =3.3v,gnd=0v,t a =25 c table43 timingparametersfor0 standardoperationconditions:vdd33 =3.3v,gnd=0v,t a =25 c remark:d=timeofonedspsystemclock rating symbol characteristic min. typ. max. unit t css cslowto1 st sclrising 100 ns t cyc sclcycletime 200 ns t ds datavalidpriorsclfalling 0 ns t dh dataholdtimeaftersclrising 10 ns t dd sdooutputdelayfromsclfalling 10 ns rating symbol characteristic min. typ. max. unit t ch cmdpinholdtime 5 ns t cs cmdpinsetuptime 5 ns t cyc systemcycletime 3.5d ns t cclw writepulsewidth 0.5d ns t cchw enablehwritewidth 3d ns t cclr readpulsewidth 0.5d ns t cchr enablehreadwidth 3d ns t ds writedatasetuptime 0.5d ns t dh writedataholdtime 5 ns t acc readaccesstime 10 ns t oh readdatadisabletime 4 ns
ST3011 ver0.2 8/13 20070614 5 5 . . p p a a d d d d i i a a g g r r a a m m
ST3011 ver0.2 9/13 20070614 6 6 . . d d e e v v i i c c e e i i n n f f o o r r m m a a t t i i o o n n 1. substrate: gnd pad no. symbol x y 1 tf0 1616.23 62.5 2 rf0 1716.23 62.5 3 tx0 1816.23 62.5 4 rx0 1916.23 62.5 5 sclk0 2016.23 62.5 6 xreq 2116.23 62.5 7 clko 2216.23 62.5 8 so0 2316.23 62.5 9 tf1 2416.23 62.5 10 rf1 2516.23 62.5 11 tx1 2616.23 62.5 12 rx1 2716.23 62.5 13 sclk1 2826.23 62.5 14 dpa13 2936.23 62.5 15 dpa14 2977.5 406.55 16 so1 2977.5 516.55 17 vdd25 2977.5 626.55 18 vss25 2977.5 736.55 19 test2 2977.5 836.55 20 test1 2977.5 936.55 21 test0 2977.5 1036.55 22 vss33 2977.5 1136.55 23 vdd33 2977.5 1236.55 24 dpb0 2977.5 1336.55 25 dpb1 2977.5 1436.55 26 dpb2 2977.5 1536.55 27 dpb3 2977.5 1636.55 28 dpb4 2977.5 1736.55 29 dpb5 2977.5 1836.55 30 dpb6 2977.5 1936.55 pad no. symbol x y 31 dpb7 2977.5 2036.55 32 dpb8 2977.5 2136.55 33 dpb9 2977.5 2236.55 34 dpb10 2977.5 2336.55 35 dpb11 2977.5 2436.55 36 dpb12 2977.5 2546.55 37 dpb13 2977.5 2656.55 38 dpb14 2977.5 2766.55 39 dpb15 2940 3107.5 40 vss33 2830 3107.5 41 vdd33 2720 3107.5 42 pwda 2620 3107.5 43 pwd 2520 3107.5 44 d7 2420 3107.5 45 d6 2320 3107.5 46 d5 2220 3107.5 47 d4 2120 3107.5 48 d3 2020 3107.5 49 sdo 1920 3107.5 50 sdi 1820 3107.5 51 scl 1720 3107.5 52 vdd25 1620 3107.5 53 vss25 1520 3107.5 54 cmd 1420 3107.5 55 pmode 1320 3107.5 56 req 1220 3107.5 57 rdy 1120 3107.5 58 wr 1020 3107.5 59 rd 920 3107.5 60 cs 820 3107.5 pad no. symbol x y 61 p/s 720 3107.5 62 reset 620 3107.5 63 cmode0 520 3107.5 64 cmode1 420 3107.5 65 oscxi 320 3107.5 66 osxo 210 3107.5 67 eclk 100 3107.5 68 vref 62.5 2753.04 69 vccout 62.5 2643.04 70 regvdd33 62.5 2533.04 71 regvss33 62.5 2433.04 72 pllvss25 62.5 2257.04 73 pllvdd25 62.5 2157.04 74 pllvss25a 62.5 2057.04 75 pllvdd25a 62.5 1957.04 76 dacvss33a 62.5 1781.04 77 dacvdd33a 62.5 1681.04 78 vcm 62.5 1581.04 79 dacob 62.5 1481.04 80 dacob 62.5 1381.04 81 dacovss33a 62.5 1281.04 82 dacovss33a 62.51 1181.04 83 dacovdd33a 62.5 1081.04 84 dacovdd33a 62.5 981.04 85 daco 62.5 881.04 86 daco 62.5 781.04
ST3011 ver0.2 10/13 20070614 7 7 . . a a p p p p l l i i c c a a t t i i o o n n c c i i r r c c u u i i t t 1. st3010 part figure71 st3010applicationcircuitdiagram note: 1.ifanyofoscxi,osxo,andeclkisnotused,it needstoconnecttognd. 2.thecascaderesistorandparallelcapacitoronc md,rd,andwrpinscanreducenoiseinterference. ingeneral,resistor isshortandcapacitorisopen.pleasepreservethe optionsonpcb.
ST3011 ver0.2 11/13 20070614 2. adc part 2k 1.2k 1.5k 10k 10k figure72 adcapplicationcircuitdiagram note: thecapacityandinductanceintheleftdown partistoeliminatetherecordnoise.
ST3011 ver0.2 12/13 20070614 3. dac part figure73 dacapplicationcircuitdiagram
ST3011 theaboveinformationistheexclusiveintellectual propertyofsitronixtechnologycorp.andshallno tbedisclosed,distributedorreproducedwithout permissionfromsitronix. sitronixtechnologycorp .reservestherighttochangethisdocumentwithou tpriornoticeandmakesnowarrantyforany errorswhichmayappear in this document. sitronix productsare not intendedforuse in life support, criticalcare,medical,safety equipment,or similarapplicationswhereproductsfailurecouldr esultininjury,orlossoflife,orpersonalorph ysicalharm,oranymilitaryordefenseapplication ,or anygovernmentalprocurementtowhichspecialterms orprovisionsmayapply. ver0.2 13/13 20070614 8 8 . . r r e e v v i i s s i i o o n n revision description page date 0.1 firstrelease 2006/2/23 0.2 addad/dacircuit 2006/5/24

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